92nd American Meteorological Society Annual Meeting (January 22-26, 2012)

Wednesday, 25 January 2012: 4:30 PM
A General Purpose FPGA Based Radar Controller and Signal Processor
Room 239 (New Orleans Convention Center )
Charles Martin, NCAR, Boulder, CO; and E. Loew and C. Burghart
Manuscript (916.7 kB)

Poster PDF (916.7 kB)

Reconfigurable computing and board level integration have experienced phenomenal advancement in the last decade. These have enabled the functionality for radar system control, signal processing and data acquisition to be migrated from rack sized systems and extensive custom circuitry onto off-the-shelf cards hosted in generic computer workstations.

The Software-Defined Digital Down Converter (SD3C) is a complete radar processor built on a single commercial digital transceiver card. Multi-channel IF digitization, down-conversion, transmit pulse generation and digital timing signals are all provided by a single PMC format card. Flexible firmware and host software utilize the onboard Field Programmable Gate Array (FPGA) to support a wide range of pulsed radar systems, from wind profilers to weather radars. The FPGA provides flexibility for a variety of signal processing tasks, such as configurable filtering, data tagging, pulse coding and compression, and coherent integration. Other capabilities are possible. Switching the signal processing behavior is achieved simply by loading different firmware.

The SD3C system requirements and design are presented. The functional components and their interconnections are explored, with discussion of the development challenges and lessons learned. Robust and well-designed software is the key to easily deploying the processor on diverse systems, and the SD3C host software architecture is detailed. Performance measures and observational results are given for the NCAR Earth Observing Laboratory's 449 MHz wind profiler, Ka-band weather radar, and W-band cloud radar.

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